1. Technical Field
Embodiments of the present disclosure may generally relate to a semiconductor device and, more particularly, to a semiconductor device configured for receiving and outputting data according to a burst length.
2. Related Art
Semiconductor devices have been continuously developed to operate at a high speed. As a result, the semiconductor devices have been designed to receive and output data in synchronization with an external clock signal. A burst operation corresponds to a typical operation for receiving and outputting the data in synchronization with the external clock signal. According to the burst operation, the semiconductor device may successively receive or output a plurality of data corresponding to a burst length in response to a single write command or a single read command if the burst length is set by a mode register set (MRS).
The burst length (BL), which is set for the burst operation, may have any one of various values such as four, eight, and sixteen. If, for example, the burst length (BL) is set to be eight (i.e., BL=8), “8”-bit data may be successively inputted to or outputted from the semiconductor device by a single write command or a single read command.